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february 2008 rev 5 1/31 31 vnd5160aj-e double channel high side driv er with analog current sense for automotive applications features general features ? inrush current active management by power limitation ? very low stand-by current ? 3.0v cmos compatible input ? optimized electromagnetic emission ? very low electromag netic susceptibility ? in compliance with the 2002/95/ec european directive diagnostic functions ? proportional load current sense ? high current sense precision for wide range currents ? current sense disable ? thermal shutdown indication ? very low current sense leakage protection ? undervoltage shut-down ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? thermal shut down ? reverse battery protection (see application schematic ) ? electrostatic discharge protection application all types of resistive, inductive and capacitive loads suitable as led driver description the vnd5160aj-e is a monolithic device made using stmicroelectronics vipower technology. it is intended for driving re sistive or inductive loads with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). this device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when cs_dis is driven low or left open. when cs_dis is driven high, the current sense pin is in a high impedance condition. output current limitation protects the device in overload condition. in case of long overload duration, the device limits the dissipated power to safe level up to thermal shut-down intervention. thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears. max supply voltage v cc 41 v operating voltage range v cc 4.5 to 36v max on-state resist ance (per ch.) r on 160 m ? current limitation (typ) i limh 5 a off state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-12 table 1. device summary package order codes tube tape and reel powersso-12 vnd5160aj-e vnd5160ajtr-e www.st.com
contents vnd5160aj-e 2/31 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21 3.1.1 solution 1 : resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . 21 3.1.2 solution 2 : diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . 22 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 23 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 powersso-12? thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
vnd5160aj-e list of tables 3/31 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. switching (vcc=13v, tj=25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. current sense (8v list of figures vnd5160aj-e 4/31 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. iout/isense vs. iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 15. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 17. on state resistance vs. t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. on state resistance vs. v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. i limh vs. t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 23. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23 figure 28. powersso-12? pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 29. rthj-amb vs. pcb copper area in open box free air condition (one channel on). . . . . . . . 24 figure 30. powersso-12? thermal impedance junction ambient single pulse (one channel on) . . . 25 figure 31. thermal fitting model of a double channel hsd in powersso-12? . . . . . . . . . . . . . . . . . 25 figure 32. powersso-12? package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 33. powersso-12? tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 34. powersso-12? tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
vnd5160aj-e block diagram and pin description 5/31 1 block diagram and pin description figure 1. block diagram table 2. pin function name function v cc battery connection. output n power output. gnd ground connection. must be reverse battery protected by an external diode/resistor network. input n voltage controlled input pin with hyst eresis, cmos compatible. controls output switch state. current sense n analog current sense pin, delivers a current proportional to the load current. cs_dis active high cmos compatible pin, to disable the current sense pin. logic undervoltage overtemp. 1 i lim 1 pwclamp 1 i out1 gnd input1 v cc output1 current sense1 driver 1 v cc clamp v dslim 1 i lim 2 pwclamp 2 driver 2 v dslim 2 overtemp. 2 i out2 output2 current sense2 cs_dis k 2 input2 k 1 pwr lim 1 pwr lim 2
block diagram and pin description vnd5160aj-e 6/31 figure 2. configuration diagram (top view) note: the above pin configuration reflects the changes notified with pcn-apg-bod/07/2886. the new pinout is backaward compatible with existing pcb layouts where pins #7 and 12 are connected to vcc. for new pcb designs, these pins should be left unconnected. powersso-12 tab = v cc n.c. output2 output1 output1 n.c. output2 12 11 10 9 8 7 1 2 3 4 5 6 cs_dis gnd input1 current sense1 input2 current sense2 table 3. suggested connections for unused and n.c. pins connection / pin current sense n.c. output input cs_dis floating n.r. (1) xx x x to ground through 1k ? resistor x n.r. (1) 1. not recommended. through 10k ? resistor through 10k ? resistor
vnd5160aj-e electrical specifications 7/31 2 electrical specifications figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. v fn (1) i s i gnd v cc v cc outputn inputn v inn v sensen gnd cs_dis i csd v csd i inn current s ensen v outn i outn i sensen table 4. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 v - i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a - i out reverse dc output current 6 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc -41 +v cc v v e max maximum switching energy (single pulse) (l=12mh; r l =0 ? ; v bat =13.5v; t jstart =150oc; i out = i liml (typ.) ) 34 mj
electrical specifications vnd5160aj-e 8/31 2.2 thermal data symbol parameter value unit v esd electrostatic discharge (human body model: r=1.5k ?; c=100pf) - input - current sense - cs_dis - output - v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 4. absolute maximum ratings (continued) table 5. thermal data symbol parameter max value unit r thj-case thermal resistance junction-case (max) (with one channel on) 8 c/w r thj-amb thermal resistance junc tion-ambient (max) see figure 29 c/w
vnd5160aj-e electrical specifications 9/31 2.3 electrical characteristics the values specified in this section are for 8v electrical specifications vnd5160aj-e 10/31 table 8. logic input symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in = 0.9v 1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1ma i in = -1ma 5.5 -0.7 7v v v csdl cs_dis low level voltage 0.9 v i csdl low level cs_dis current v csd = 0.9v 1 a v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd = 2.1v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd = 1ma i csd = -1ma 5.5 -0.7 7v v table 9. protection and diagnostics (1) 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13v 5v vnd5160aj-e electrical specifications 11/31 table 10. current sense (8v electrical specifications vnd5160aj-e 12/31 figure 4. current sense delay characteristics t dsense1h delay response time from falling edge of cs_dis pin v sense <4v, 0.08a vnd5160aj-e electrical specifications 13/31 figure 5. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax ? t dsense2h t t t
electrical specifications vnd5160aj-e 14/31 figure 6. i out / i sense vs. i out (see table 10 for details) figure 7. maximum current sense ratio drift vs load current note: parameter guaranteed by design; it is not tested. 200 250 300 350 400 450 500 550 600 650 700 0,35 0,58 0,81 1,04 1,27 1,5 max tj = -40 c to 150 c max tj = 25 c to 150 c min tj = 25 c to 150 c min tj = -40 c to 150 c typical value i out / i sense i out (a) -15 -10 -5 0 5 10 15 0,1 0,3 0,5 0,7 0,9 1,1 1,3 1,5 1,7 i out (a) dk/k(%)
vnd5160aj-e electrical specifications 15/31 figure 8. switching characteristics figure 9. output voltage drop limitation table 11. truth table conditions input output sense (v csd =0v) (1) 1. if the v csd is high, the sense output is at a high impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 short circuit to gnd (r sc 10 m ? ) l h h l l l 0 0 if t j < t tsd v senseh if t j > t tsd short circuit to v cc l h h h 0 < nominal negative output voltage clamp l l 0 v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff von iout vcc-vout tj=150 o c tj=25 o c tj=-40 o c von/ron(t)
electrical specifications vnd5160aj-e 16/31 table 12. electrical transient requirements iso 7637-2: 2004(e) test pulse test levels (1) number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv 1 -75v -100v 5000 pulses 0.5 s 5 s 2 ms, 10 ? 2a +37v +50v 5000 pulses 0.2 s 5 s 50 s, 2 ? 3a -100v -150v 1h 90 ms 100 ms 0.1 s, 50 ? 3b +75v +100v 1h 90 ms 100 ms 0.1 s, 50 ? 4-6v-7v1 pulse 100 ms, 0.01 ? 5b (2) +65v +87v 1 pulse 400 ms, 2 ? iso 7637-2: 2004(e) test pulse test level results (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (2) 2. valid in case of external load dump clamp: 40v maximum referred to ground. cc class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
vnd5160aj-e electrical specifications 17/31 figure 10. waveforms sense current input normal operation undervoltage v cc v usd v usdhyst input sense current load current load current overload operation input sense current t tsd t r t j load current input load voltage sense current load current electrical specifications vnd5160aj-e 18/31 2.4 electrical characteristics curves figure 11. off state output current figure 12. high level input current figure 13. input clamp voltage figure 14. input low level figure 15. input high level figure 16. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.05 0.1 0.15 0.2 0.25 0.3 iloff (ua) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua ) vin=2.1v -50 -25 0 25 50 75 100 125 150 175 tc (c ) 5 5.2 5.4 5.6 5.8 6 6.2 6.4 6.6 6.8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 vihyst (v)
vnd5160aj-e electrical specifications 19/31 figure 17. on state resistance vs. t case figure 18. on state resistance vs. v cc figure 19. undervoltage shutdown figure 20. turn-on voltage slope figure 21. i limh vs. t case figure 22. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c ) 80 100 120 140 160 180 200 220 240 260 280 300 ron (mohm) io u t =0 . 5 a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 75 100 125 150 175 200 225 250 275 300 ron (mohm) tc =-40c tc =25c tc =125c tc =150c -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 100 200 300 400 500 600 700 800 900 1000 (dv out/dt)on (v /ms ) vcc=13v ri=26ohm -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 2 4 6 8 10 12 14 16 ilimh (a ) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 100 200 300 400 500 600 700 800 900 1000 (dv out/dt)off (v /ms) vcc=13v ri=26ohm
electrical specifications vnd5160aj-e 20/31 figure 23. cs_dis high level voltage figure 24. cs_dis clamp voltage figure 25. cs_dis low level voltage -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc (c ) 4 4.5 5 5.5 6 6.5 7 7.5 8 vcsdcl (v) ic s d =1 m a -50 -25 0 25 50 75 100 125 150 175 tc (c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 vcsdl (v)
vnd5160aj-e application information 21/31 3 application information figure 26. application schematic note: channel 2 has the same internal circuit as channel 1. 3.1 gnd protection networ k against reverse battery 3.1.1 solution 1 : resistor in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600mv / (i s(on)max ). 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggest s to utilize solution 2 (see below). v cc gnd output d gnd r gnd d ld c +5v v gnd cs_dis iinput r prot r prot current sense r prot r sense c ext
application information vnd5160aj-e 22/31 3.1.2 solution 2 : diode (d gnd ) in the ground line a resistor (r gnd =1k ?) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the grou nd network will produce a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares t he same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the mcu i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of mcu and the current required by the hsd i/o s (input levels compatibility) with the latch-up limit of mcu i/os. -v ccpeak /i latchup r prot (v ohc -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v ohc 4.5v 5k ? r prot 180k ? . recommended values: r prot =10k ?, c ext =10nf .
vnd5160aj-e application information 23/31 3.4 maximum demagnetization energy (v cc = 13.5v) figure 27. maximum turn-off current versus inductance (for each channel) note: values are generated with r l =0 ?. in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. demagnetization demagnetization demagnetization t v in , i l c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse 0,1 1 10 0,1 1 10 100 l (mh) i (a) a b c
package and pc board thermal data vnd5160aj-e 24/31 4 package and pc board thermal data 4.1 powersso-12? thermal data figure 28. powersso-12? pc board note: layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area= 77mm x 86mm, pcb thickness=1.6mm, cu thickness=70m (front and back side), copper areas: from minimum pad lay-out to 8cm 2 ). figure 29. r thj-amb vs. pcb copper area in open box fr ee air condition (one channel on) 40 45 50 55 60 65 70 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
vnd5160aj-e package and pc board thermal data 25/31 figure 30. powersso-12? thermal impedance junction ambient single pulse (one channel on) equation 1: pulse calculation formula where = t p /t figure 31. thermal fitting model of a double channel hsd in powersso-12? (a) a. the fitting model is a semplified thermal tool and is valid for transient evol utions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 1 10 100 0,001 0,01 0,1 1 10 100 1000 time (s) zth (c/w) footprint 8 cm 2 2 cm 2 z th r th z thtp 1 ? () + ? =
package and pc board thermal data vnd5160aj-e 26/31 table 13. thermal parameters area/island (cm 2 )footprint28 r1= r7 (c/w) 1.2 r2= r8 (c/w) 6 r3 (c/w) 3 r4 (c/w) 8 8 7 r5 (c/w) 22 15 10 r6 (c/w) 26 20 15 c1= c7 (w.s/c) 0.0008 c2= c8 (w.s/c) 0.0016 c3 (w.s/c) 0.0166 c4 (w.s/c) 0.2 0.1 0.1 c5 (w.s/c) 0.27 0.8 1 c6 (w.s/c) 3 6 9
vnd5160aj-e package and packing information 27/31 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second-level interconnect. the category of second-level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. 5.2 package mechanical data figure 32. powersso-12? package dimensions
package and packing information vnd5160aj-e 28/31 table 14. powersso-12? mechanical data symbol millimeters min. typ. max. a 1.250 1.620 a1 0.000 0.100 a2 1.100 1.650 b 0.230 0.410 c 0.190 0.250 d 4.800 5.000 e 3.800 4.000 e0.800 h 5.800 6.200 h 0.250 0.500 l 0.400 1.270 k0 8 x 2.200 2.800 y 2.900 3.500 ddd 0.100
vnd5160aj-e package and packing information 29/31 5.3 packing information figure 33. powersso-12? tube shipment (no suffix) figure 34. powersso-12? tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 1.85 b 6.75 c ( 0.1) 0.6 a c b base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.05) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.1) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
revision history vnd5160aj-e 30/31 6 revision history table 15. document revision history date revision changes 13-sep-2004 1 initial release. 10-apr-2006 2 layout changed. major update to section 2: electrical specifications . 01-mar-2007 3 reformatted. contents, list of tables and list of figures added. added section 3.4: maximum demagnetization energy (vcc = 13.5v) . ecopack ? package information added. 10-dec-2007 4 document reformatted and restructured. updated figure 2: configuration diagram (top view) : pins 7-12 left unconnected (n.c) and added note. table 4: absolute maximum ratings : corrected e max value from 14 to 34 mj. added figure 5: delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) . updated figure 6: iout/ isense vs. iout (see table 10 for details) . added figure 7: maximum current sense ratio drift vs load current . updated table 10: current sense (8v vnd5160aj-e 31/31 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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